In logic devices such as finFETs (field-effect transistors), metal gate parasitic capacitance can negatively impact electrical performance. One way to reduce this parasitic capacitance is to optimize ...
In this work, we will demonstrate first negative capacitance transistor (NCFET) with ferroelectric HfO2 thin film by establishing device design and developing material for ultralow power operation. A ...
If you are going to use a silicon carbide (SiC) MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) in your next development, you will ask yourself: how do I develop the best gate driver for it ...
TSMC’s roadmap announcement for their 28 nm node yesterday has stirred considerable controversy already. The issue is the company’s decision to divide their process development into two tracks: one to ...
How is peak current defined? A close look at datasheet headlines and how they vary. A case study that compares different drivers and peak currents. One question often comes up when considering what ...
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